Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.

The role

We are seeking an experienced Analog /RF IC designer to architect, implement and productise the multi‑lane, multi‑standard SerDes (serialiser / deserialiser) interfaces that move data in and out of the OTPU at tens of gigabits per second per lane. You will own both transmit and receive paths—equalisers, CDRs, drivers, samplers and clocking assist blocks—while ensuring robust operation over challenging channels and across multiple aggregated lanes. Your designs will be central to realising Flux’s multi‑terabit‑per‑second optical fabric.

Responsibilities

• Define, design and verify SerDes cores operating at >25Gb/s‑per‑lane, including TX FIR/DFE equalisation, CTLE/FFE receivers, decision‑feedback paths, and high‑linearity output drivers.

• Develop adaptive clock‑data‑recovery (CDR) loops and multi‑lane deskew / phase‑alignment schemes that achieve < 200 fs rms additive jitter and < 5 ps lane‑to‑lane skew.

• Model channel losses (PCB, package, fibre) and work with signal‑integrity engineers to co‑optimise link budgets, impedance control and return‑loss targets.

• Partner tightly with analog designers photonic, packaging, and digital micro‑architecture teams to integrate SerDes IP into large chiplets and optical transceiver modules.

• Mentor junior engineers, conduct rigorous design reviews, and establish best‑practice flows for high‑speed mixed‑signal design, verification and lab characterisation.

Skills & Experience

• 7 + years of industry experience designing production high‑speed SerDes, multi‑GHz CDRs, or comparable mixed‑signal I/O macros in advanced CMOS nodes.

• Demonstrated success taping out > 56 Gb/s links meeting BER < 10‑12, stringent jitter masks and channel compliance specs.

• Deep understanding of link‑level signal‑integrity, phase noise, adaptive equalisation, clock multiplication and on‑chip calibration techniques.

• Mastery of state‑of‑the‑art EDA flows: behavioral modeling (Verilog‑A/AMS, IBIS‑AMI), transient / S‑parameter simulation, EM extraction, and mixed‑signal verification.

• Strong measurement skills: high‑speed probing, BERT eye‑diagramming, de‑embedding, PRBS and compliance testing.

• Bachelor’s degree in Electrical Engineering or related field (Master’s / PhD preferred).

• Excellent cross‑disciplinary communication, problem‑solving aptitude, and a proven ability to deliver in fast‑moving, innovation‑driven environments.

• A portfolio of patents, publications or open‑source contributions that highlights creative SerDes or high‑speed analog design insight.

Frequent travel is expected between our Austin and London offices.

We’re building fast and that includes our benefits. More exciting additions are coming soon for the Flux crew.

If you are passionate about pushing the boundaries of what's possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.